1. Technical Field
The present invention relates generally to an improved data processing system and, in particular, to a method and system for monitoring performance within a data processing system.
2. Description of Related Art
In typical computer systems utilizing processors, system developers desire optimization of software execution for more effective system design. Usually, studies are performed to determine system efficiency in a program's access patterns to memory and interaction with a system's memory hierarchy. Understanding the memory hierarchy behavior helps in developing algorithms that schedule and/or partition tasks, as well as distribute and structure data for optimizing the system.
Within state-of-the-art processors, facilities are often provided which enable the processor to count occurrences of software-selectable events and to time the execution of processes within an associated data processing system. These facilities are known as the performance monitor of the processor. Performance monitoring is often used to optimize the use of software in a system. A performance monitor is generally regarded as a facility incorporated into a processor to monitor selected characteristics to assist in the debugging and analyzing of systems by determining a machine's state at a particular point in time. Often, the performance monitor produces information relating to the utilization of a processor's instruction execution and storage control. For example, the performance monitor can be utilized to provide information regarding the amount of time that has passed between events in a processing system. As another example, software engineers may utilize timing data from the performance monitor to optimize programs by relocating branch instructions and memory accesses. In addition, the performance monitor may be utilized to gather data about the access times to the data processing system's L1 cache, L2 cache, and main memory. Utilizing this data, system designers may identify performance bottlenecks specific to particular software or hardware environments. The information produced usually guides system designers toward ways of enhancing performance of a given system or of developing improvements in the design of a new system.
Events within the data processing system are counted by one or more counters within the performance monitor. The operation of such counters is managed by control registers, which are comprised of a plurality of bit fields. In general, both control registers and the counters are readable and writable by software. Thus, by writing values to the control register, a user may select the events within the data processing system to be monitored and specify the conditions under which the counters are enabled.
To evaluate the efficiency of a processor, it is necessary to determine how much work is performed and how many resources are consumed on behalf of executing instructions. Many modern processors implement speculative processing to achieve high performance. As a result, some of the instructions that are processed may be canceled or flushed without completely executing because the condition for which they were speculatively executed did not occur. Like any other instruction, speculative instructions consume resources within the processor. Most modern processors implement performance monitor counters that count the occurrence of predefined event associated with the use of resources. However, in a processor with both performance monitoring and speculative execution of instructions, performance monitor counters count events for both non-speculative instructions, i.e. instructions which complete execution, and speculative instructions, i.e. instructions which do not complete.
Therefore, it would be advantageous to have a method and system for monitoring the use of resources accurately within a processor that performs speculative execution of instructions. It would be further advantageous to have a method and system for comparing the use of resources within a processor between completed instructions and those instructions that are speculatively executed and not completed.